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A2F500M3G-1FG256

Manufacturer:

Microchip Technology

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Package Case:

FPBGA-256

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2822

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A2F500M3G-1FG256 information

Specifications

A2F500M3G-1FG256 technical specifications, attributes, parameters and parts with similar specifications to A2F500M3G-1FG256 .

manufacturer
Microchip Technology
Package / Case
FPBGA-256
Surface Mount
YES
Supplier Device Package
256-FPBGA (17x17)
Number of Terminals
256
Base Product Number
A2F500
Clock Frequency-Max
100 MHz
Data RAM Size
64 kB
Factory Pack QuantityFactory Pack Quantity
90
Ihs Manufacturer
MICROSEMI CORP
Manufacturer Part Number
A2F500M3G-1FG256
Maximum Clock Frequency
100 MHz
Maximum Operating Supply Voltage
1.575 V
Maximum Operating Temperature
+ 85 C
Mfr
Microchip Technology
Minimum Operating Supply Voltage
1.425 V
Minimum Operating Temperature
0 C
Moisture Sensitive
Yes
Moisture Sensitivity Levels
3
Mounting Styles
SMD/SMT
Number of I/Os
117 I/O
Number of Logic Elements
6000 LE
Operating Temperature-Max
85 °C
Package
Tray
Package Body Material
PLASTIC/EPOXY
Package Code
LBGA
Package Description
17 X 17 MM, 1.60 MM HEIGHT, 1 MM PITCH, FBGA-256
Package Equivalence Code
BGA256,16X16,40
Package Shape
SQUARE
Package Style
GRID ARRAY, LOW PROFILE
Part Life Cycle Code
Active
Product Status
Active
Reflow Temperature-Max (s)
30
Risk Rank
5.24
Rohs Code
No
Shipping Restrictions
This product may require additional documentation to export from the United States.
Supply Voltage-Max
1.575 V
Supply Voltage-Min
1.425 V
Supply Voltage-Nom
1.5 V
Tradename
SmartFusion
Typical Operating Supply Voltage
1.5000 V
Operating Temperature
0 to 85 °C
Packaging
Tray
Series
A2F500
Terminal Finish
TIN LEAD/TIN LEAD SILVER
HTS Code
8542.39.00.01
Technology
CMOS
Terminal Position
BOTTOM
Terminal Form
BALL
Peak Reflow Temperature (Cel)
225
Terminal Pitch
1 mm
Reach Compliance Code
compliant
JESD-30 Code
S-PBGA-B256
Number of Outputs
66
Qualification Status
Not Qualified
Power Supplies
1.5,1.8,2.5,3.3 V
Temperature Grade
OTHER
Speed
100MHz
RAM Size
64KB
Core Processor
ARM® Cortex®-M3
Peripherals
DMA, POR, WDT
Program Memory Size
512 kB
Connectivity
EBI/EMI, Ethernet, I²C, SPI, UART/USART
Architecture
MCU, FPGA
Number of Inputs
66
Organization
11520 CLBS, 500000 GATES
Seated Height-Max
1.7 mm
Programmable Logic Type
FIELD PROGRAMMABLE GATE ARRAY
Number of Gates
500000
Speed Grade
1
Primary Attributes
ProASIC®3 FPGA, 500K Gates, 11520 D-Flip-Flops
Number of CLBs
11520
Number of Logic Cells
11520
Number of Cores
1 Core
Number of Equivalent Gates
500000
Flash Size
512KB
Length
17 mm
Width
17 mm